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--
-- Intel 8251 Benchmark -- Receiver
--
-- Source: Intel Data Book
--
-- VHDL Benchmark author Indraneel Ghosh
-- University Of California, Irvine, CA 92717
--
-- Developed on April 7, 92
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THIS DIRECTORY HAS THE FOLLOWING FILES :
tx.vhd : Model of the "transmitter" process in the VHDL model of 8251
USART
vectors : VHDL test vectors directory for the "transmitter" process
test_vectors_tx.doc : Documentation for the test vectors. Contains description of
testing strategy.
cmd_tx.inc : Simulation command file for "transmitter" process test vectors.
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PROCEDURE FOR SIMULATING THE TEST VECTORS FILE :
(1) Compile the MVL7 data types file :
zvan types.vhd
(2) Compile the VHDL data types file :
zvan synthesis_types.vhd
(3) Compile the VHDL data functions file :
zvan MVL7_functions.vhd
(4) Compile the VHDL model file of the 8251 USART:
zvan tx.vhd
(5) Compile a test vector file :
zvan tx_async_5_1x.vhdl
(6) Simulate the test vectors :
zvsim -t ns -i cmd_tx.inc E
The simulation output appears in a file called "run.out".
Any simulation errors (outputs not matching expected values) are shown
by "Assert" statements in the file "run.out".
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