README file for Period Counter design example. Author: Preeti Ranjan Panda (ppanda@ics.uci.edu) Last Modified: 18 Jan 95 This directory contains the files relevant to the Period Counter Verilog model. The contents of this directory are: Counter.doc - Document explaining functionality in brief Counter.v - Verilog model README - This file No test suites were made available. <div align="center"><br /><script type="text/javascript"><!-- google_ad_client = "pub-7293844627074885"; //468x60, Created at 07. 11. 25 google_ad_slot = "8619794253"; google_ad_width = 468; google_ad_height = 60; //--></script> <script type="text/javascript" src="http://pagead2.googlesyndication.com/pagead/show_ads.js"> </script><br /> </div>