LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
--
LIBRARY EXEMPLAR;
USE EXEMPLAR.exemplar_1164.ALL;
--
LIBRARY WORK;
USE WORK.synthesis_utilities.ALL;
USE WORK.synthesis_parameters.ALL;
USE WORK.global_environment.ALL;
USE WORK.PackCon.ALL;     

--
ENTITY instruction_register_unit IS
  PORT (load : IN std_logic);
END instruction_register_unit;
--
ARCHITECTURE Concurrent OF instruction_register_unit IS
BEGIN
  PROCESS (load)
  BEGIN
                -- first free
    DeAlloc(ir_out);            
     
                -- allocate for the new data
    Equate(obus, ir_out);            
  END PROCESS;
END Concurrent;